Physical Biometrics for Hardware Security of DSP and Machine Learning Coprocessors presents state-of-the art explanations for detective control-based security and protection of digital signal processing (DSP) and machine learning coprocessors against hardware threats. Such threats include intellectual property (IP) abuse and misuse, for example, fraudulent claims of IP ownership and IP piracy. DSP coprocessors such as finite impulse response filters, image processing filters, discrete Fourier transform, and JPEG compression hardware are extensively utilized in several real-life applications. Further, machine learning coprocessors such as convolutional neural network (CNN) hardware IP cores play a vital role in several applications such as face recognition, medical imaging, autonomous driving, and biometric authentication, amongst others. Written by an expert in the field, this book reviews recent advances in hardware security and IP protection of digital signal processing (DSP) and machine learning coprocessors using physical biometrics and DNA. It presents solutions for secured coprocessors for DSP, image processing applications and CNN, and where relevant chapters explores the advantages, disadvantages and security-cost trade-offs between different approaches and techniques to assist in the practical application of these methods. The interdisciplinary themes and topics covered are expected to be of interest to researchers in several areas of specialisation, encompassing the overlapping fields of hardware design security, VLSI design (high level synthesis, register transfer level, gate level synthesis), IP core, optimization using evolutionary computing, system-on-chip design, and biometrics. CAD/design engineers, system architects and students will also find this book to be a useful resource.

ocessing (DSP) and machine learning coprocessors using physical biometrics and DNA. It presents solutions for secured coprocessors for DSP, image processing applications and CNN, and where relevant chapters explores the advantages, disadvantages and security-cost trade-offs between different approaches and techniques to assist in the practical application of these methods. The interdisciplinary themes and topics covered are expected to be of interest to researchers in several areas of specialisation, encompassing the overlapping fields of hardware design security, VLSI design (high level synthesis, register transfer level, gate level synthesis), IP core, optimization using evolutionary computing, system-on-chip design, and biometrics. CAD/design engineers, system architects and students will also find this book to be a useful resource. ocessing (DSP) and machine learning coprocessors using physical biometrics and DNA. It presents solutions for secured coprocessors for DSP, image processing applications and CNN, and where relevant chapters explores the advantages, disadvantages and security-cost trade-offs between different approaches and techniques to assist in the practical application of these methods. The interdisciplinary themes and topics covered are expected to be of interest to researchers in several areas of specialisation, encompassing the overlapping fields of hardware design security, VLSI design (high level synthesis, register transfer level, gate level synthesis), IP core, optimization using evolutionary computing, system-on-chip design, and biometrics. CAD/design engineers, system architects and students will also find this book to be a useful resource.

ocessing (DSP) and machine learning coprocessors using physical biometrics and DNA. It presents solutions for secured coprocessors for DSP, image processing applications and CNN, and where relevant chapters explores the advantages, disadvantages and security-cost trade-offs between different approaches and techniques to assist in the practical application of these methods. The interdisciplinary themes and topics covered are expected to be of interest to researchers in several areas of specialisation, encompassing the overlapping fields of hardware design security, VLSI design (high level synthesis, register transfer level, gate level synthesis), IP core, optimization using evolutionary computing, system-on-chip design, and biometrics. CAD/design engineers, system architects and students will also find this book to be a useful resource. image processing applications and CNN, and where relevant chapters explores the advantages, disadvantages and security-cost trade-offs between different approaches and techniques to assist in the practical application of these methods. The interdisciplinary themes and topics covered are expected to be of interest to researchers in several areas of specialisation, encompassing the overlapping fields of hardware design security, VLSI design (high level synthesis, register transfer level, gate level synthesis), IP core, optimization using evolutionary computing, system-on-chip design, and biometrics. CAD/design engineers, system architects and students will also find this book to be a useful resource.