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Assembly Language for X86 Processors, Global Edition
Assembly Language for X86 Processors, Global Edition
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Author(s): Irvine, Kip
Irvine, Kip R.
ISBN No.: 9781292061214
Pages: 720
Year: 201406
Format: Trade Paper
Price: $ 121.22
Dispatch delay: Dispatched between 7 to 15 days
Status: Available

Put Theory into Practice Protected mode programming is entirely the focus of the printed chapters (1 through 13). This edition uses the x86 and x86-64 processor types, explaining the differences between instruction operands and basic architecture differences. Students create applications that take full advantage of 32-bit and 64-bit processors, using protected mode and flat memory addressing. This also allows students to create Microsoft® Windows applications. 16-bit programming is still covered, using chapters from the previous edition, supplied electronically from the Pearson supplements website. Extensive link libraries and sample programs from the book are provided free of charge from the author's personal website. The libraries support 64-bit, 32-bit, and 16-bit programming that students use for basic input/output, simulations, timing, and other useful tasks. The Irvine32 and Irvine64 libraries run in protected mode.


The 16-bit version (Irvine16.lib) runs in real-address mode and is used only by chapters 14 through 17. Full source code for the libraries is supplied on the companion website. There is far less dependency on the author's subroutine libraries in this edition. Students are encouraged to call system functions themselves and use the Visual Studio debugger to step through the programs. The Irvine32 and Irvine64 libraries are available to help students handle input/output, but their use is not required. This edition features increased use of supplementary explanations of short program examples, particularly in the first 5 chapters. New programming exercises have been added, others removed, and a few existing exercises were modified.


Review questions and exercises have been moved from the middle of the chapter to the end of chapters, and divided into two sections: (1) Short answer questions, and (2) Algorithm workbench exercises. The latter exercises require the student to write a short amount of code to accomplish a goal. Each chapter now has a Key Terms section, listing new terms and concepts, as well as new MASM directives and Intel instructions. Tailor the Text to Fit your Course Early chapters now include short sections that feature 64-bit CPU architecture and programming, and we have created a 64-bit version of the book's subroutine library named Irvine64 . Students can program in either 32-bit or 64-bit mode. Legacy chapters on 16-bit programming are provided electronically through the Pearson supplements website. Support Instructors and Students Companion Web site http://www.pearsonhighered.


com/irvine/ New VideoNotes covering essential content topics have been created by the author and added to the Pearson website. VideoNotes are step-by-step video tutorials specifically designed to enhance the programming concepts presented in Irvine, Assembly Language for X86 Processors, 7e . Students can view the entire problem-solving process outside of the classroom-when they need help the most. VideoNotes are available with the purchase of a new copy of select titles. Go to www.pearsonhighered.com/videonotes for a brief VideoNotes demo. New Testbanks have been prepared by the author for this edition.


For this edition, the author has prepared revised PowerPoint® lecture slides.


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